Three-dimensional (3D) circuits containing stacked, multiple layers of interconnected circuitry provide potential solutions for increasing the performance and planar density of integrated circuits. An example of such a 3D circuit is a memory circuit that is comprised of multiple layers of interconnected memory elements, each layer being an interconnected two-dimensional array (2D) of the memory elements. The electrical properties of a memory element, such as its internal voltage for a given external voltage applied to the multilayer structure, can vary depending on the position of the memory element in the multilayer structure. As a result, the performance of the memory circuit can be affected. A memory circuit having a multilayer architecture of memory elements that present uniform electrical properties, including uniform internal voltages, regardless of position in the multilayer structure, for a given external applied voltage, would be beneficial.
Throughout the drawings, identical reference numbers designate similar, but not necessarily identical, elements.